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or the parallelized hardware Considering only the size and delay of any ALU circ

ID: 1715079 • Letter: O

Question

  or the parallelized hardware

Considering only the size and delay of any ALU circuits, and assuming an ALU (whether 64-bit or 128-bit) has k transistors and a delay of t nanoseconds:

How many transistors do the two versions of the circuit use?

What is the total time taken to compute the product in each case?

Multiplicand Shift left Multiplier 64-bit ALU Shift right Product Control test- Write 64 bits FIGURE 3.3 First version of the multiplication hardware. The Multiplicand register, ALU and Product register are all 64 bits wide, with only the Multiplier register containing 32 bits. (Appendix B 1 bit on each step. The multiplier is shifted in the opposite direction at each step. The algorithm starts with the product initialized to O.Control decides when to shift the Multiplicand and Multiplier registers and when to write new values into the Product register.

Explanation / Answer

first multiplication hardware hardware: they consist of 4 transister

total time = 4* 264

= 1280 * 1060 sec

new hardware mutiplication, they consist of 7 transistor

total time= 232 *7

= 28 *230 sec