Implement a 4-bit full adder shown in the image below using 4 1-bit full adder i
ID: 1715914 • Letter: I
Question
Implement a 4-bit full adder shown in the image below using 4 1-bit full adder in verilog.
The verilog for a 1-bit full adder is
// 1-bit full adder
module fullAdder(a, b, cin, sum, cout);
input a, b, cin;
output sum, cout;
reg sum, cout;
always @(a or b or cin) begin
sum <= #2 a ^ b ^ cin;
cout <= #2 (a & b)|(a & cin)|(b & cin);
end
endmodule
4bitAdder cin a0 b0 fullAdder cin sum so b Cout fullAdder cin sum b1 b Cout fullAdder cin sum S2 a2 b2 b COut fullAdder S3 cin sum a3 b3 b Cout coutExplanation / Answer
// Design of 4 Bit Adder using 4 Full adder (Structural Modeling Style).v
module adder_4bit ( a ,b ,sum ,carry );
output [3:0] sum ;
output carry ;
input [3:0] a ;
input [3:0] b ;
wire [2:0]s;
full_adder u0 (a[0],b[0],1'b0,sum[0],s[0]);
full_adder u1 (a[1],b[1],s[0],sum[1],s[1]);
full_adder u2 (a[2],b[2],s[1],sum[2],s[2]);
full_adder u3 (a[3],b[3],s[2],sum[3],carry);
endmodule
//-------------------- 1 - bit Full Adder Design ---------------------
module full_adder ( a ,b ,c ,sum ,carry );
output sum ;
output carry ;
input a ;
input b ;
input c ;
assign sum = a ^ b ^ c;
assign carry = (a&b) | (b&c) | (c&a);
endmodule
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