This is my code: library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.NUMERIC_STD

Question

This is my code:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use ieee.std_logic_arith.all;


ENTITY alu IS
PORT(
A : IN std_logic_Vector (3 downto 0);
B : IN std_logic_Vector (3 downto 0);
F : IN std_logic_Vector(2 downto 0);
S : out std_logic_Vector (4 downto 0));
END alu;

ARCHITECTURE arc_alu OF alu IS
BEGIN
PROCESS (A, B)
variable TEMP: std_logic_Vector(4 downto 0);

BEGIN
case F is
when "000" => TEMP:= A;
when "001" => TEMP:= NOT A;
when "010" => TEMP:= A + B;
when "011" => TEMP:= A - B;
when "100" => TEMP:= B;
when "101" => TEMP:= NOT B;
when "110" => TEMP:= A + 1;
when "111" => TEMP:= A - 1;
END CASE;
s<=TEMP;
END PROCESS;
END arc_ALU;

Here is my error:
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
Info: Processing started: Sun Jun 17 16:43:38 2012
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off alu -c alu
Info: Found 2 design units, including 1 entities, in source file alu.vhd
Info: Found design unit 1: alu-arc_alu
Info: Found entity 1: alu
Error (10327): VHDL error at alu.vhd(24): can't determine definition of operator ""+"" -- found 0 possible definitions
Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 222 megabytes
Error: Processing ended: Sun Jun 17 16:43:39 2012
Error: Elapsed time: 00:00:01
Error: Total CPU time (on all processors): 00:00:01
Error: Quartus II Full Compilation was unsuccessful. 3 errors, 0 warnings

CAN ANYONE HELP ME???????????

Explanation / Answer

You can check your code once more, it is almost correct, what I think so the error must be due to basic mistake in syntax that can be any semicolon missing, or any thing else

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