For problems 1 to 3, refer to the Verilog Hardware Description Language (HDL) mo
ID: 1810568 • Letter: F
Question
For problems 1 to 3, refer to the Verilog Hardware Description Language (HDL) module shown below. The module below adds each of the input bits, A, B, C, and D together, and the module stores the result output into a 3-bit register, which is parsed into separate bits for the output.
module ones_count(input wire A, input wire B, input wire C, input wire D,
output wire X, output wire Y, output wire Z);
//A place to store the 3-bit output
wire [2:0] out;
//Add each bit together
assign out = A + B + C + D;
//Parse the output into seperate bits
assign X = out[2];
assign Y = out[1];
assign Z = out[0];
endmodule
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1. Given the output X = 0, Y = 1, and Z =0. How many input bits have value of one?
A. One B. Two C. Three D. Four E. None
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2. Assume the HDL module is modified to allow additional input bits. How many total input bits could the HDL module count unambiguously with the single 5-bit output register?
A. 31 B. 5 C. 15 D. 4 E. None
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3. Given the inputs as A = 0, B = 1, C = 0, and D =1. What is the value of the output register?
A. 1102 B. 0112 C.01012 D. 0102 E. None
Can you explain how each answer is obtained. I cannot figure out what this program is saying. Thank you
Explanation / Answer
here the inputs are A,B,C,D
they are summed up to give output 'out'
now out is broken down into binary and they are respectively shown in X, Y, Z
so if
A=1
B=1
C=1
D=0
out=A+B+C+D=3 or 011 in binary.
X=out[2]=0
Y=out[1]=1
Z=out[0]=1
1>
the output is of form XYZ=010
so to be the output 10 in binary maximum two i/p can be 1.
answer B
2>
for counting with 5-bit o/p register,
total i/p bits=2^5-1=31
answer A
3>
summing them up,
out=2
X=0
Y=1
Z=0
0102
answer D
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