EE 3310 EE 3310 Contemporary Assignment JFET-BJT Cascade Amplifier (Due: in Clas

Question

EE 3310 EE 3310 Contemporary Assignment JFET-BJT Cascade Amplifier (Due: in Class 6:10 pm, Monday, April 15 2013) Design analysis 150 ptsl below. The JFET has ra 30 kn and Consider the JFET-BJT cascade amplifier shown the BJT has ro 20 KS2. A For the original design, (lo, Vos, VDs) for the first JFET stage. a) [6 ptsl Determine the DC biasing conditions second BJT stage. b) [6 pts] Determine the DC biasing conditions (lc, VCE) for the of each stage. c) [6 pts] Determine the input impedance and output impedance voltage gain of d) [10 pts] Determine the voltage gain of each stage and the overall the JFET-BJT cascade amplifier. overall DC power of the e) [6 pts] Determine the DC power of each stage and the JFET-BUT cascade amplifier. removed, B For the design with both stage's 100 HF capacitances stage. [6 pts] Determine the input impedance and output impedance of each gain of g) [10 pts] Determine the voltage gain of each stage and the overall voltage the JFET-BJT cascade amplifier. +10 V 2.7 kn 24 0,1HF A 1501 0.05 2 mv 8.2 kn 10 MK2 22 kn 100 WF 100 HF 3300

Explanation / Answer

Vgs = -Id*330 ...........

now   Id = idss*(1-Vgs/Vp)^2

        -Vgs/330 = 6(1+Vgs/3)^2

         9+Vgs^2 + 10.5Vgs = 0

                 Vgs = -0.94 v

id = 0.94/330 =2.85*10^-3 A

Vds = 10 -id(1.8+0.33) =3.92 v

b) Vb = bas evoltage = 10*8.2/(24+8.2) =2.54 v

      ie = (2.54 -0.7)/8.2 =0.22 mA

     ic = ie = 0.22 mA

     Vce =10 -ie*(2.7+2.2) =8.89 v

c) input impedance of FET = 10M ohm

  

   input impedance of BJT = rd || 8.2 || 24 = 0.98 k ohm

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