a) An overflow occurs when the result of adding two number islarger than can be
ID: 1829854 • Letter: A
Question
a) An overflow occurs when the result of adding two number islarger than can be represented. for example, two 4-bit signednumbers will cause an overflow if their result is greater than +7or less than -8. For example, the following additions will cause anoverflow because their results are outside the range. So, if4-bit addition is performed on these numbers, what will the resultbe interpreted as?6+6 -7+-3
b) How can someone detect an overflow condition during a 4-bitaddition by examining the sign bits of the two inputs and theresult?
Explanation / Answer
It's been a while since i worked with overflows but heres theartihmatic signed magnitude: the left bit isnt included in the number and '0'is postive and '1' is neg ones compliment: the numbers are switched 1's for 0's andvice versa, left most bit is sign same as signed magnitude twos compliment same as one's compliment but add one to the numberif negitive. using signed magnitude: (6)0110 + (6)0110 = (-8)1100 (-7)1111+(-3)1011= (-2)1|1010 using ones compliment: (6)0110 + (6)0110= (3)1100 (-7)1001+(-3)1100= (2)1| 0101 using twos compliment: (6)0110 + (6)0110=(-2)1100 (-7)1010+(-3)1101= (0)1|0111
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