a) A Mealy sequential circuit has one input (x) and one output (z). z=1 if and o
ID: 1832787 • Letter: A
Question
a) A Mealy sequential circuit has one input (x) and one output (z). z=1 if and only if the most recent input, combined with the preceding three inputs, was not a valid BCD encoding of a decimal digit; otherwise, z=0. Assume the BCD digit are received least significant bit first. Derive a state table for the circuit. Assume that in the reset state all previous inputs were 0. (Three states are sufficient.)b) Repeat for a Moore circuit, i.e. z=1 if and only if the previous four inputs were not a valid BCD digit. (Four states are sufficient.)
c) Is it possible for a Moore circuit to generate the correct output while the fourth input bit is present rather than after it has been received? Explain your answer.
Explanation / Answer
14.13 (a) state next State Meaning 1 2 3 0 0 Initial State 2 4 4 0 0 1st bit was 0 3 5 6 0 0 1st bit was 1 4 7 7 0 0 1st 2 bits were 0- 5 7 8 0 0 1st 2 bits were 10 6 8 8 0 0 1st 2 bits were 11 7 1 1 0 0 1st 3 bits were 0-- or -00 8 1 1 1 1 1st 3 bits were 1-1 or 11- State Next State x = 0 x = 1 z State Meaning 1 2 3 0 Initial State, Valid BCD digit 2 4 4 0 1st bit was 0 3 5 6 0 1st bit was 1 4 7 7 0 1st 2 bits were 0- 5 7 8 0 1st 2 bits were 10 6 8 8 0 1st 2 bits were 11 7 1 1 0 1st 3 bits were 0-- or -00 8 9 9 0 1st 3 bits were 1-1 or 11- 9 2 3 1 Invalid BCD digit
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