It is required to design the active-loaded differential MOS amplifier of Fig. 1

Question

It is required to design the active-loaded differential MOS amplifier of Fig. 1 to obtain a differential gain of 50V/V. The technology available provides µnCox = 4µpCox = 250uA/V2, |Vt|=0.5V, |VA’|=20V/µm and operates from ±1V supplies. Use a bias current I=200µA and operate all devices at |VOV|=0.2V.
a) Find the W/L ratios of the four transistors.
b) Specify the channel length required of all transistors.
c) If VCM=0, what is the allowable range of vo?
d) If I is delivered by a simple NMOS current source operated at the same VOV and having the same channel length as the other four transistors, determine the CMRR obtained

Explanation / Answer

there is no fig..

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