The accompanying diagram above shows a two input NAND gate on the left and the t
ID: 1834438 • Letter: T
Question
The accompanying diagram above shows a two input NAND gate on the left and the timing diagram for the circuit on the right hand side of the diagram.
The NAND gate has two inputs labeled “A” and “B” with an output, labeled “X”.
Three waveforms are lined up by time in this illustration to show the relationship between the inputs and outputs of the NAND gate at any point in time. The three waveforms are labeled A, B and X. A and B represent the input voltage values and X represents the output voltage value of the NAND gate. Eight complete time periods are shown. The values at these time periods are:
Period 1: A is a low value and B is a low value, X is not shown.
Period 2: A is high value, B is a low value, X is not shown.
Period 2: A is high value, B is a high value, X is a not shown.
Period 3: A is low value, B is a low value, X is not shown.
Period 4: A is low value, B is a high value, X is not shown.
Period 5: A is low value, B is a low value, X is not shown.
Period 6: A is high value, B is a high value, X is not shown.
Period 8: A is a low value and B is a low value, X is not shown.
Explanation / Answer
for nand gate we get (AB)' which means only when A and B are 1 only we get 0 else always 1 Period 1: A is a low value and B is a low value, X is high. Period 2: A is high value, B is a low value, X is not high. Period 2: A is high value, B is a high value, X is a low. Period 3: A is low value, B is a low value, X is high. Period 4: A is low value, B is a high value, X is high. Period 5: A is low value, B is a low value, X is high Period 6: A is high value, B is a high value, X is low. Period 8: A is a low value and B is a low value, X is high
Related Questions
drjack9650@gmail.com
Navigate
Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.