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Suppose we want to design a state machine that controls an up/down counter. An up/down counter circuit produces a new value every cycle which is the previous value +/- the count amount. The circuit that is being controlled is shown below. The circuit should first be provided an initial value as well as a value that indicates by how much to count that value up or down.

There are two single-bit inputs, called run and up. The run input indicates that the machine should start counting, while up indicates whether the machine should count up (when up=1) or down (when up=0). The machine will be initialized when run=0, and will count either up or down when run=1.

This state machine requires 4 states. Four states means that we need 2 state bits (S[1] and S[0]). The encodings used for the states are listed next to the state description below.

State 00: Change count amount
State 01: Initialize counter register
State 10: Count Up
State 11: Count Down

There are three single bit outputs that will be used to control the WE1, op, and Sel signals of the circuit. Assume that the op (operation) signal for the ALU is 0 for addition and 1 for subtraction.

The state transition diagram for this state machine is shown below.

Fill in the next-state truth table, and the output truth table for this state machine. Use S[1] S[0] as the CURRENT state, and S'[1] S'[0] as the NEXT state.

Next State Truth Table S[1] S[0] run up S'[1] S'[0] 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 Suppose we want to design a state machine that controls an up/down counter. An up/down counter circuit produces a new value every cycle which is the previous value +/- the count amount. The circuit that is being controlled is shown below. The circuit should first be provided an initial value as well as a value that indicates by how much to count that value up or down. There are two single-bit inputs, called run and up. The run input indicates that the machine should start counting, while up indicates whether the machine should count up (when up=1) or down (when up=0). The machine will be initialized when run=0, and will count either up or down when run=1. This state machine requires 4 states. Four states means that we need 2 state bits (S[1] and S[0]). The encodings used for the states are listed next to the state description below. There are three single bit outputs that will be used to control the WE1, op, and Sel signals of the circuit. Assume that the op (operation) signal for the ALU is 0 for addition and 1 for subtraction. The state transition diagram for this state machine is shown below. Fill in the next-state truth table, and the output truth table for this state machine. Use S[1] S[0] as the CURRENT state, and S'[1] S'[0] as the NEXT state.

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