defining values for an array read There are several methods used in VHDL to spec

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defining values for an array read There are several methods used in VHDL to specify the values for a multibit data object. The most commonly used for BIT_VECTOR and STD_LOGIC_VECTOR signal types have the following forms. (x TO y) (w DOWNTO z) The syntax "lowest_index TO highest_index" is generally used with a multibit signal that is simply an array of bits. As an example, consider the case where the port definition is SIGNAL A :BIT_VECTOR (1 TO 4). In this definition, the most significant (left-most) bit of A is referenced using the lowest_index (1), and the least significant (right-most) bit is referenced with the highest_index (4). More specifically, if SIGNAL A is assigned a value of "1010", the result is that A(1) = 1, A(2) = 0, A(3) = 1, and A(4) = 0. The syntax "highest_index DOWNTO lowest_index" is used when the signal represents a binary number. In this case, the most significant bit (MSB) is assigned the highest_index, and the least significant bit (LSB) is assigned the lowest_index. As an example, consider the definition of SIGNAL B :BIT_VECTOR (3 DOWNTO 0). In this case, if SIGNAL B is assigned a value of "1010", the result will be that B(3) = 1, B(2) = 0, B(1) = 1, and B(0) = 0. The multibit data object B has been assigned the binary value equivalent to the decimal number 10. This is the opposite of the assignments on Signal A. In defining values to a multibit data object, a binary base is the default reference. A hexadecimal base can be specified by using the designator X. For example, a binary value of "01111110" can be designated as X "7E." Multibit data objects of the INTEGER type use a third method for specifying values. The syntax "lowest_number RANGE highest_number" is used for INTEGER types. what the difference is between TO and DOWNTO ? and describes VHDL as C-like Can you give examples?

Explanation / Answer

All declarations VHDL ports, signals and variables must specify their corresponding type or subtype. There are three defined data types in VHDL - Access - pointers in other prog. language For example: TYPE node; TYPE pointer IS ACCESS node; TYPE node IS RECORD data : INTEGER; link : pointer; END RECORD; Scalar - atomic units (integer, real, enumerated and physical) Composite - arrays and/or records note::VHDL 1076-1987 has a forth type - File. But in VHDL 1076-1993 files are reclassified as objects. A type defines a set of values. A signal (or variable) with a particular type can only be assigned a value in the set of values that is defined for the type. We have used the type BIT in our examples without clarifying the definition of BIT. A signal with type BIT can take on either '0' or '1' as its value. ALso in our examples signals declare their types either in the PORT section of the ENTITY or before BEGIN in the ARCHITECTURE section. Signals and/or values and/or expression must have matching type at both side of the assignment ("

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