You are given the following information about the MIPs microarchitecture. Regist
ID: 1996357 • Letter: Y
Question
You are given the following information about the MIPs microarchitecture. Register TRegister Register Number Name Content 19 ESS 0x18 SS2 0x16 SS1 16 SSO 0x26 R-Type Instructions Function Description 100000 (32 Add 100010(34 Sub I-Type Instructions Description 001000 Add Immediate Add instruction is written as add rd, rs, rt Sub instruction is written as sub rd, rs, rt Add immediate instruction is written as addirt, rs, imm R-Type rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits I-Type imm rs rt 16 bits 6 bits 55 bits 5 bits 1). G points convert the following assembly code to machine oode addi SS3, SS3, 4Explanation / Answer
Answer:
1. addi $S3, $S3, 4 ; Add the content of $S3 register to immideate value 4 and stored it in $S3
Machine code will follow I-Type format and it is...
001000 10011 10011 0000 0000 0000 0100 = 0x22734
2. 0x02128822 = 0000 0010 0001 0010 1000 1000 0010 0010
most upper six bits are opcode hence opcode = 000000 = 0x00 = (00)10
Hence this is R-Type instruction since opcode do not match to immidiate opcode.
Last six bits represent function performed by ALU, hence function = 100010 = 0x22 = (34)10
From function code it is clear that it is a subtraction operation code.
source register, rs = 10000 = (16)10 = $S0
targer register, rt = 10010 = (18)10 = $S2
destination register, rd = 10001 = (17)10 = $S1
shift amount, shamt = 00000 = (00)10
ASM code is : sub $S1, $S0, $S2
3. Operation result from part 1:
$S3 = 0x1C ; Since 0x18 + 4 = 0x1C
$S2 = 0x16 ; Not affected
$S1 = 0xA ; Not affected
$S0 = 0x26 ; Not affected
Operation result from part 2:
performed operation : rd = rs - rt
or $S1 = $S0 - $S2
Hence
$S3 = 0x1C ; Not affected
$S2 = 0x16 ; Not affected
$S1 = 0x10 ; Since 0x26 - 0x16 = 0x10
$S0 = 0x26 ; Not affected
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