You are the package designer for your company\'s FPGA product line, which has un

Question

You are the package designer for your company's FPGA product line, which has undergone rapid development as chip manufacturing has improved. Two years ago, you designed a successful 200-lead package for a 10,000-gate followed last year by a 400-lead package when the FPGA product was expanded to 40,000 gates. Given reliability constraints, your team has established that this package technology can be expanded to 600 leads next year, when the chip designers plan an expansion to 100,000 gates. Are the chip and package design plans compatible?

Explanation / Answer

Explanation:

Generally, The chip manufacturing follows the process of placement and routing and it takes place on the rectangular/square wafer.

So whenever there is an expansion of gates it needs to be followed some ratio between the number of leads and number of gates otherwise it will be a problem in placement and routing which leads to not to meet time , area and power constraints of FPGA.

Here, It mentioned that

Before two years, 200-lead package designed for 10000 gates

last year, 400-lead package designed for 40000 gates

so if we follow the proper procedure to maintain the ratio of manufacturing this year this ratio will give 600-lead package for 160000 gates.

so the particular technology considered that we used last two years will not be compatible for this FPGA design.

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