Verilog Calculator Hi, I Need some help making up this code... I have a template

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Verilog Calculator Hi, I Need some help making up this code... I have a template here but dont know how to put it to use if someone could help me... Template code below... THANKS!

module top;

wire [7:0]result;

wire overflow;

reg [7:0]input1;

reg [7:0]input2;

reg [3:0]opcode;

calculator_m calculator(result, overflow, input1, input2, opcode);

initial begin

$monitor("input1: ", input1, " input2: ",input2," opcode: ",opcode," overflow: ",overflow," result: ",result);

end

initial begin

input1 = 15; input2 = 15; opcode = 1;

#2 opcode = 2;

#2 input1 = 10;

#2 opcode = 3;

#2 input1 = 5;

#2 opcode = 15;

#2 //add more here!

end

endmodule

module calculator_m(output reg [7:0]result, output reg overflow, input [7:0]input1, input2, input [3:0]opcode);

always@(/*fill this in*/) begin

//use if/else or case/switch

end

endmodule

ELEC 2275 - Digital Logic Verilog ALU Operations You will design a Verilog calculator. Given 2 8-bit inputs and a 4-bit operation code (opcode), you should correctly output the result. Below are the operation codes. The input operands to the functions will be chosen by you to prove the system is working properly. You must be able to explain all inputs All inputs are integers Explanation Opcode eration No-Op (no inputs, |This is a default placeholder op. Basically, setall 0000 output all 0s Add Subtract Multipl Divide Modulus And Or Not Greater Than Equa Less Than outputs to 0 Add the 2 8-bit inputs to get an output Subtract the 2 8-bit inputs to get an output Multiply the 2 8-bit inputs to get an output Divide the 2 8-bit inputs to get a quotient output Divide the 2 8-bit inputs to get a remainder output 0101 Bitwise AND function Bitwise OR function Invert the 1st input, but ignore the 2"d input Compare if 1s' input is greater than the 2" Compare if 1st input is equal to the 2 Compare if 1st input is less than the 2 0001 0010 0011 0100 0110 0111 1000 1001 1010 1011 The logical comparators will return 1 for true and 0 for false Any opcodes that aren't listed don't do anything. Make sure you somehow account for them. Once you design the Verilog calculator module, you will need to create a test module also. Prove your tests give the

Explanation / Answer

/////////////// DESIGN FILE /////////////////////
module calculator (
input       [7:0] in1, in2,
input       [3:0] opcode,
output reg [15:0] out1
);

always @ (*)
begin
    case(opcode)
      4'b0001 : out1 = in1 + in2    ;
      4'b0010 : out1 = in1 - in2    ;
      4'b0011 : out1 = in1 * in2    ;
      4'b0100 : out1 = in1 / in2    ;
      4'b0101 : out1 = in1 % in2    ;
      4'b0110 : out1 = in1 & in2    ;
      4'b0111 : out1 = in1 | in2    ;
      4'b1000 : out1 = ~in1         ;
      4'b1001 : out1 = (in1 > in2) ;
      4'b1010 : out1 = (in1 == in2) ;
      4'b1011 : out1 = (in1 < in2) ;
      default : out1 = 0;
    endcase
end

endmodule

///////////// TEST_BENCH_FILE /////////////////
module top;
reg [7:0] in1, in2;
reg [3:0] opcode;
wire [15:0] out1;

// instantiation of the module
calculator c1 (.in1(in1), .in2(in2), .opcode(opcode), .out1(out1));

integer i;

initial begin
   $monitor("in1 = %d in2 = %d opcode = %d out1 = %d", in1, in2, opcode, out1);
   in1 = 8'd24;
   in2 = 8'd5;
   for (i = 0; i < 12 ; i = i + 1) begin
      opcode = i;
      #20;
   end

   in1 = 8'd16;
   in2 = 8'd3;
   for (i = 0; i < 12 ; i = i + 1) begin
      opcode = i;
      #20;
   end

end

endmodule

/************* Simulation Result ********************
in1 = 24 in2 =   5 opcode = 0 out1 =     0
in1 = 24 in2 =   5 opcode = 1 out1 =    29
in1 = 24 in2 =   5 opcode = 2 out1 =    19
in1 = 24 in2 =   5 opcode = 3 out1 =   120
in1 = 24 in2 =   5 opcode = 4 out1 =     4
in1 = 24 in2 =   5 opcode = 5 out1 =     4
in1 = 24 in2 =   5 opcode = 6 out1 =     0
in1 = 24 in2 =   5 opcode = 7 out1 =    29
in1 = 24 in2 =   5 opcode = 8 out1 = 65511
in1 = 24 in2 =   5 opcode = 9 out1 =     1
in1 = 24 in2 =   5 opcode = 10 out1 =     0
in1 = 24 in2 =   5 opcode = 11 out1 =     0
in1 = 16 in2 =   3 opcode = 0 out1 =     0
in1 = 16 in2 =   3 opcode = 1 out1 =    19
in1 = 16 in2 =   3 opcode = 2 out1 =    13
in1 = 16 in2 =   3 opcode = 3 out1 =    48
in1 = 16 in2 =   3 opcode = 4 out1 =     5
in1 = 16 in2 =   3 opcode = 5 out1 =     1
in1 = 16 in2 =   3 opcode = 6 out1 =     0
in1 = 16 in2 =   3 opcode = 7 out1 =    19
in1 = 16 in2 =   3 opcode = 8 out1 = 65519
in1 = 16 in2 =   3 opcode = 9 out1 =     1
in1 = 16 in2 =   3 opcode = 10 out1 =     0
in1 = 16 in2 =   3 opcode = 11 out1 =     0
****************************************************/

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