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Mode control Register operation No change Shift left Shift right The registers r

ID: 2267177 • Letter: M

Question


Mode control Register operation No change Shift left Shift right The registers reset asynchronously to all 0's when clear is set to 1. All ather functions are positive edge triggered. Assume the following inputs: * Parallel inputs: I,-0 (left-most bit), 1,-1,1,-1, le-0 (right-most bit) . Serial input for right-shift 0 . Serial input for left-shift 1 Assuming that the initilal value of the register is 0000, what is the register value for the instances in time, t...., marked in the following timing diagram? CLK Register value at t, is Register value at t is Register value at ts is Register value at t, is Register value at ts is Register value at ts is

Explanation / Answer

initial

0

0

0

0

Action

t1

0

0

0

0

No Change

t2

0

1

1

0

Parallel Load

t3

0

0

1

1

Shift Right

t4

0

0

0

0

No Change, Clear got 1 after t3 (asyn reset)

t5

0

0

0

1

Shift Left

t6

0

0

0

0

Asynchronous clear resets to register to 0

initial

0

0

0

0

Action

t1

0

0

0

0

No Change

t2

0

1

1

0

Parallel Load

t3

0

0

1

1

Shift Right

t4

0

0

0

0

No Change, Clear got 1 after t3 (asyn reset)

t5

0

0

0

1

Shift Left

t6

0

0

0

0

Asynchronous clear resets to register to 0

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