I want to make 4 bit ripple carry adder-subtractor using verilog HDL. I made 4 b
ID: 2315389 • Letter: I
Question
I want to make 4 bit ripple carry adder-subtractor using verilog HDL.
I made 4 bit ripple carry adder below. but I must make 4 bit adder-subtractor.
please help me to make 4 bit adder-subtractor using my 4 bit adder verilog code.
please don't make new code. just add some codes to my code..
module half_adder(x,y,s,c);
input x,y;
output s,c;
assign s=x^y;
assign c=x&y;
endmodule
module full_adder(x,y,ci,s,co);
input x,y,ci;
output s,co;
wire hs,hc,tc;
half_adder HA1(x,y,hs,hc);
half_adder HA2(hs,ci,s,tc);
assign co=tc|hc;
endmodule
module adder_4(A,B,C0,S,C4);
input [3:0] A,B;
input C0;
output [3:0] S;
output C4;
wire [3:1] C;
full_adder FA0(A[0],B[0],C0,S[0],C[1]);
full_adder FA1(A[1],B[1],C[1],S[1],C[2]);
full_adder FA2(A[2],B[2],C[2],S[2],C[3]);
full_adder FA3(A[3],B[3],C[3],S[3],C4);
endmodule
Explanation / Answer
module adder_subtactor_4bit ( a ,b ,sel ,dout );
output [3:0] dout ;
input [3:0] a ;
input [3:0] b ;
input sel ;
wire [3:0]m;
wire [3:0]n;
adder_4bit u0 (.a (a),
.b (b),
.sum (m));
subtractor_4bit u1 (.a(a),
.b(b),
.diff (n));
mux_4bit u2 (.a(m),
.b(n),
.sel(sel),
.dout(dout));
endmodule
Related Questions
drjack9650@gmail.com
Navigate
Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.