Code a VHDL function which accepts a n-dimensional bit vector as argument and co

Question

Code a VHDL function which accepts a n-dimensional bit vector as argument and counts the number of '1' s and the number of '0' s in bit. It then returns an integer which is: +1 if the number of '1''s exceeds the number of '0' s. 0 if the number of '1' 's and the number of 0's are equal. -1 if the number of '1' ' s is less than the number of 0's Declare a package containing the above function. In addition the package should also contain: a J-K flip - flop as a component. a type SPEED which can assume values SLOW. MEDIUM and FAST a variable c which is an integer between -5 and + 5 initialized to 3. ECE-C302 Template for Test bench entity test bench is define no of tests end; architecture mixed of testbench is component EUT - - entity under test Include component under test end component; define 2D types required for the test data base Using these types define signals constituting the different test inputs and expected outputs define type for FSM and a signal for

Explanation / Answer

function count_bits(s:STD_LOGIC_VECTOR)

variable x,y,z,temp:natural;

begin

process(a)

begin

x:=0;

for i in s' range loop

if s(i)=='1' then

x:=x+;

end if;

end loop;

y=x;

end process;

process(a1)

begin

temp:=0;

for i in s' range loop

if s(i)=='0' then

temp:=temp+ ;

end if;

end loop;

z=temp;

end process;

if y>z then return '1'

end if;

if y=z then return '0'

end if;

if y<z then return '-1'

end if;

end function count_bits;

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