In chip manufacturing, 20% of the chips are subjected to high levels of contamin

Question

In chip manufacturing, 20% of the chips are subjected to high levels of contamination, 30% to madium levels of contamination, and 50% to high level of contamination. Assuma tha following probabilities for product failure. subject to levels of contamination in manufacturing: Let H denote the event that a chip is exposed to high levels ot contamination M denote the event that a chip is exposed to medium levels of contamination L denote the event that a chip is exposed to low levels ot contamination What is the probability that a product using one of these chips fails?

Explanation / Answer

Let F be the event that product fails, H be the event that chips is from High level, M be the event that chip is from medium level and L be the event that chip is from low level.

Then we have given the information as

P(H) = 0.2, P(M)=0.3 and P(L)=0.5

P(F/H)=0.1, P(F/M)= 0.01 and P(F/L)=0.001

So the probability that the product fails is

P(F) = P(H)*P(F/H) + P(M)*P(F/M) + P(L)*P(F/L)

= (0.2*0.1) +(0.3*0.01) +(0.5*0.001)

=0.2+0.03+0.005

P(F) = 0.235

The probability that the product fails is 0.235

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