Given the single cycle implementation of a processor as shown in Figure 1 below,

Question

Given the single cycle implementation of a processor as shown in Figure 1 below, with the name of each component marked.

For each instruction, some components are used in certain order, whereas some other components are not used. For example, for ADD instruction, the following components are used in the given order, where the components are at the same time (parallel) are put in a pair parentheses:

         ADD: PC, (Adder1, IM), (Main Control, Registers), ALU, (PC, Registers)

         The control signals required for executing ADD instruction are as follows:

         Follow the example to answer the following questions:

1.1    For LW instruction:

(1)   List the components used and the order of being used.

(2)   Given values of the control signals required for executing this instruction. You may use dont care value x if necessary.

1.2    For BEQ instruction:

(1)   List the components used and the order of being used.

(2)   Given values of the control signals required for executing this instruction. You may use dont care value x if necessary.

Given the single cycle implementation of a processor as shown in Figure 1 below, with the name of each component marked. For each instruction, some components are used in certain order, whereas some other components are not used. For example, for ADD instruction, the following components are used in the given order, where the components are at the same time (parallel) are put in a pair parentheses: ADD: PC, (Adder1, IM), (Main Control, Registers), ALU, (PC, Registers) The control signals required for executing ADD instruction are as follows: RegDst = 1 ALUSrc = 0 MemToReg = 0 RegWrite = 1 MemRead = 0 MemWrite = 0 Branch = 0 Follow the example to answer the following questions: 1.1 For LW instruction: (1) List the components used and the order of being used. (2) Given values of the control signals required for executing this instruction. You may use dont care value x if necessary. RegDst = ALUSrc = MemToReg = RegWrite = MemRead = MemWrite = Branch = 1.2 For BEQ instruction: (1) List the components used and the order of being used. (2) Given values of the control signals required for executing this instruction. You may use dont care value x if necessary. RegDst = ALUSrc = MemToReg = RegWrite = MemRead = MemWrite = Branch =

Explanation / Answer

1.1

1)the components used here in the order are:

MULTIPLEXR

CPU

ADDER

MEMORY

REGISTERS

2)

1.2

1)

MULTIPLEXR

CPU

ADDER

MEMORY

REGISTERS

2)

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