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1. (a) Explain the difference between a Harvard architecture and a Princeton arc

ID: 3568013 • Letter: 1

Question

1. (a) Explain the difference between a Harvard architecture and a Princeton architecture. (b) A Princeton architecture is more commonly referred to using a different name. What is this name?


2. See the single-cycle design on p. 6 of the Chapter 4 lecture notes which implements the subset of the MIPS
instructions listed on p. 6. There are 16 datapath components in this design: (1) PC (register); (2) PC Adder; (3) PC
Src Mux; (4) Instruction Memory; (5) Registers (the register file); (6) Sign Extend Unit; (7) ALU Control; (8) ALU
Src2 Mux; (9) ALU; (10) Data Memory; (11) Result Mux; (12) Dst Reg Mux; (13) Shift Left by 2 Unit; (14) Branch
Adder; (15) Branch AND Gate; and (16) Control.


(a) During the execution of sw $t0, -8($fp) list and describe what each datapath component is outputting or doing
(a one- or two-sentence explanation is sufficient) and why it is doing that. For Control, specify the state of each
control signal, i.e., 0, 1, 10, 01, x (x = don't care), etc. For ALUControl, specify the state of the ALUOpInput signal.


(b) Some of the datapath components are doing something which is not actually necessary during the execution of sw. Identify which components are performing unnecessary operations. Note: what I am looking for in this exercise is to see if you understand how the single-cycle design executes MIPS instructions, and in particular, how it executes this particular sw instruction

Explanation / Answer

1.a)

Differences between Harvard architechture and Princeton architecture are as listed below:

1.b)

Princeton architecture is more commonly referred to as Von Neumann architecture.

2.a)

When “sw $t0, -8($fp)” instruction is executed, functions performed by the datapath components are as given below:

2.b)

The required data path components for executing sw $t0, -8($fp) are given below:

Hence, the other datapath components are not necessary to perform their jobs during the execution of sw.