Computer Architecture: Memory and Cache. If you already answered 8 words, please

Question

Computer Architecture: Memory and Cache. If you already answered 8 words, please skip and let the others help! Thanks.

(Q1) For a direct-mapped cache with a 32-bit address, the following bits of the address are used to access the cache:

Tag: 31-10 // Index: 9-5 // Block Offset: 4-0 // What is the block size (in words)?

(a) 32 words

(b) 16 words

(c) 5 words

(d) 8 words

I answered (d) 8 words but professor says that's wrong. Any explanation?

[2^n where n is number of offset - 2 so 5-2=3 and 2^3 is 8 words ???]

Explanation / Answer

Here the block offset is 4-0 that is 5 bits.

The cache block size= 25 = 32 bytes= 16 words (Since 1 word= 4 bytes for 32 bit address)

So the answer is option (d) 8 words.

It is only only theright answer.

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