using the subtraction operator in verilog display the result in decimal in a sev
ID: 3577794 • Letter: U
Question
using the subtraction operator in verilog display the result in decimal in a seven sigmant display. Both A and B are a 4bit input
Description S1 So Operation 00 The addition should be based on a Carry Look- A B ahead adder. Display the result in decimal on the Seven-Segment-Display. 01 A B Use the operator in Verilog. Display the result in decimal on the Seven-Segment-Display. Shift Right A Designed based on a shift register. Do not use 10 B times the shift operator. Display the result in decima on the Seven-Segment-Display. 11 Compare A Compare A and Band Display Gr8, LSS, or EqL on and B the Seven Segment Displays.
Explanation / Answer
// following verilog code get the two input of 4 bit numbers and 2bit number for select signal
// according to the select signal value if perform the operation using operator
// on the basis of given table it perform add, subtract, right shift or compare operation
module SubtractAndDisp(A,B,S,Res,Overflow,Disp); // begiing of Module
input [3:0] A; //Input 4 bit number in A
input [3:0] B; //Input 4 bit number in B
input [1:0] S; //Input 2 bit number for select signal in S
output reg [3:0] Res; // register variable res to hold the 4bit result of operation
output reg Overflow; // register to hold the overflow bit
output reg [6:0] Display;
wire [3:0] A; //connect element A to our input Port (for First Operand Input)
wire [3:0] B; //connect element B to our input Port (for Second Operand Input)
wire [1:0] S; //connect element S to our input Port (for Select Signal Input)
always @(A,B) begin
if (S == 2'b00)
{Overflow, Res} = A + B; //add if S0S1 = 00
else if (S == 2'b01)
{Overflow, Res} = A - B; //subtract if s0s1==01
else if (S == 2'b10)
{Res} = A >> B; //right shift A B times if s0s1=10
else if (S == 2'b11)
{Res} = A == B; //compare A and B if S0s1==11
end
always @(Overflow,Res) begin //test the result in res variable and print
case (Res) //corresponding value on 7bit display
4'b0000: Display = 7'b1111110;//0
4'b0001: Display = 7'b0110000;//1
4'b0010: Display = 7'b1101101;//2
4'b0011: Display = 7'b1111001;//3
4'b0100: Display = 7'b0110011;//4
4'b0101: Display = 7'b1011011;//5
4'b0110: Display = 7'b1011111;//6
4'b0111: Display = 7'b1110000;//7
4'b1000: Display = 7'b1111111;//8
4'b1001: Display = 7'b1111011;//9
4'b1010: Display = 7'b1110111;//A
4'b1011: Display = 7'b0011111;//B
4'b1100: Display = 7'b1001110;//C
4'b1101: Display = 7'b0111101;//D
4'b1110: Display = 7'b1001111;//E
4'b1111: Display = 7'b1000111;//F
default: Display = 7'bx;
endcase
if (Overflow == 1)begin //test for overflow if overflow is equal to 1 then
Res = 4'bx; //display overflow result
Display = 7'b0011101;
end
end
endmodule //end of module
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