Consider a demand-paging system with a paging disk that has an average access an
ID: 3583683 • Letter: C
Question
Consider a demand-paging system with a paging disk that has an average access and transfer time of 50 ms. Addresses are translated through a page table in main memory, with an access time of 5 us per memory access. Thus, each memory reference through the page table takes two accesses (i.e. 10 us). To improve this time, we have added an associative memory (TLB) that reduces access time to 6 us, if the page-table entry is in the associative memory.
Assume that 60% of the accesses are in the associative memory, and that, of the remaining, 10% (or 4% of the total) cause page faults. What is the effective memory access time?
Explanation / Answer
Answer:
Demand Paging is the Concept in which a Process is Copied into the Logical Memory from the Physical Memory when we needs them. A Process can load either Entire, Copied into the Main Memory or the part of single Process is copied into the Memory so that is only the single Part of the Process is copied into the Memory then this is also called as the Lazy Swapping.
For Swapping the Process from the Main Memory or from the Physical Memory, a Page Table must be used. The Page Table is used for Storing the Entries which Contains the Page or Process Number and also the offset Number which indicates the address of the Process where a Process is Stored and there will also be the Special or Extra Bit which is also Known as the Flag Bit which indicates whether the Page is Stored into the Physical Memory.
The Page Table Contains two Entries those are used as valid and invalid means whether the Process is Stored into the Page Table. Or Whether the Demand Program is Stored into the Physical Memory So that they can be easily swapped. If the Requested Program is not stored into the Page Table then the Page Table must Contains the Entries as v and I means valid and invalid along the Page Number.
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