(chapter 4.1) Consider the following instruction: Instruction: Add Rd, Rs, Rt In

Question

(chapter 4.1) Consider the following instruction: Instruction: Add Rd, Rs, Rt Interpretation: Reg[Rd] = Reg[Rs] + Reg[Rt]

a. What are the values of control signals generated by the control in Figure 4.2 for the above instruction?  

RegWrite, MemRead, ALUMux, MemWrite, ALUOp, & RegMux Branch

b. Which resources (blocks) perform a useful function for this instruction?

c. Which resources (blocks) produce outputs, but their outputs are not used for this instruction?

d. which resources (blocks) produce no output for this instruction?

Explanation / Answer

a) RegMux Branch, ALUOp, RegWrite

b)

1.internal system bus which connects register unit, control unit and ALU

2.Arithmetic Logic Unit(ALU) and some gates inside of ALU to hold a value

3.Registers

4.Main work done by control unit. It generates required signals at right time to compute and store value back to register.

c) I think, every above resource’s outputs will be used to complete this instruction.

d) Buses will not produce any outputs for this instruction. But useful to hold data.

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