I was wondering if someone can clarify this for me regarding this question: A DM

Question

I was wondering if someone can clarify this for me regarding this question:

A DMA module is transferring characters to memory using cycle stealing, from a device
transmitting at 9600 bps. The processor is fetching instructions at the rate of 1 million
instructions per second (1 MIPS). By how much will the processor be slowed down by
DMA activity?

The answer is 1 MIPS to 998,800 IPS (1,000,000 - 1,200) assuming the data width is a byte.

but if the data width is 2 bytes...would it make sense that the slowed down activity be:

1 MIPS to 997,600 IPS (1,000,000 - 2,400)

Explanation / Answer

The data width of the system bus is a byte, the DMA module will steal a cycle each time a byte has arrived. Then if the device receives 9600 bps (bits per second). These bits convert into bytes. So, 1200 bytes ( because 1 byte=8bits) will be received every second. Therefore, the CPU will slow from 1 MIPS (Million instructions per second) to (1,000,000-1200) instructions persecond. So yes, by the same logic if we double that, we would double the steal.

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