(1) All of following are ?Architecture except one a. Execution Pipeline. b. Bus

Question

(1) All of following are ?Architecture except one
a. Execution Pipeline.
b. Bus Width.
c. Addressing Mode.
d. Cache and Cache Size.

(2) Average number of clock cycles between instruction completions.
a. IPC.
b. CPI.
c. TLP.
d. ISA

(3) If a 19% reduction in voltage may result in a 19% reduction in frequency. What
would be the impact on dynamic power?
a. % 53.
b. % 35.
c. % 63.
d. % 61.

(4) Viewing a computer, or any digital system, in this way is called the.
a. Memory addresses register.
b. Register transfer level.
c. Registers are designated.
d. Register control function.

(5) Number of events per unit time.
a. Latency.
b. Bandwidth.
c. Hit time.
d. Average memory access time.

Explanation / Answer

1c
2b
3a
4a
5d

Related Questions

Navigate

• Browse (All)
• Browse #
• Subjects

---

---

Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.