Consider a processor in which a two-word instruction is stored at location 100 w

Question

Consider a processor in which a two-word instruction is stored at location 100 with its address field at location 101 as shown below.
Memory
Registers Address Content
PC =100 100 Load to AC; Mode
101 Address = 600
R1 = 300 102 Next instruction
: :
XR = 200 200 300
: :
BR = 300 300 700
: :
AC = ? 400 200
: :
500 100
: :
600 400
: :
702 500
:
800 900
: :
900 800

The first word of the instruction specifies the operation code and mode; the second word specifies the address part.
The values of the program counter (PC register), a general register (R1), the index register (XR), the base register (BR), and certain addresses in memory are as shown below.

Evaluate the effective address and the value that is loaded into the AC for the following addressing modes:

Addressing Mode Effective address Value of the operand loaded into the AC
a) Immediate
b) Direct addressing
c) Indirect addressing
d) Register
e) Register indirect
f) Relative address
g) Base register addressing
h) Indexed addressing

Explanation / Answer

Here's the missing part but I can't answer it...

Memory<?xml:namespace prefix = o ns = "urn:schemas-microsoft-com:office:office" />

Registers Address Content

PC =100

100

Load to AC; Mode

101

Address = 600

R1 = 300

102

Next instruction

:

:

XR = 200

200

300

:

:

BR = 300

300

700

:

:

AC = ?

400

200

:

:

500

100

:

:

600

400

:

:

702

500

:

800

900

:

:

900

800

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