for the simplified structure of a CPU, all the instructions and data are atored

Question

for the simplified structure of a CPU, all the instructions and data are atored om a memory chip. Consider the binary machine code instruction given as 0xD8B9000000CC, which is stored at memory location with address 0xCC and the content at data register D4 (which is inside the CPU), and store the result to data register D$. Assume the content stored at memory location with location with address 0xCC is 0x88.

a( Please give a one-line RTL representation of the instructions.

b) During the process that the CPU 'fetches and executes' the instruction, how many read/write operations with the memory chip are needed? (Here read/write operation is to read something from the memory chip or to write something to the memory chip) An in each read/write operation, please give the values (in hexidecimal format) that appear on the address bus and on the data bus.

Explanation / Answer

RTL: Register Transfer Level.

a. Description: A synchronous circuit consists of two kinds of elements: registers and combinational logic. Registers (usually implemented as D flip-flops) synchronize the circuit's operation to the edges of the clock signal, and are the only elements in the circuit that have memory properties. Combinational logic performs all the logical functions in the circuit and it typically consists of logic gates.

For example, a very simple synchronous circuit is shown in the figure. The inverter is connected from the output, Q, of a register to the register's input, D, to create a circuit that changes its state on each rising edge of the clock, clk. In this circuit, the combinational logic consists of the inverter.

When designing digital integrated circuits with a hardware description language, the designs are usually engineered at a higher level of abstraction than transistor level (logic families) or logic gate level. In HDLs the designer declares the registers (which roughly correspond to variables in computer programming languages), and describes the combination logic by using constructs that are familiar from programming languages such as if-then-else and arithmetic operations. This level is calledregister-transfer level. The term refers to the fact that RTL focuses on describing the flow of signals between registers.

b. 1.The two basic operations performed by a memory chip are "read", in which the data contents of a memory word is read out (nondestructively), and "write" in which data is stored in a memory word, replacing any data that was previously stored there. To increase data rate, in some of the latest types of memory chips such as DDR SDRAM multiple words are accessed with each read or write operation.

2.Memory is manufactured in word length that is usually a power of two, typically N=1, 2, 4 or 8 bits.

3.Data is accessed by means of a binary number called a memory address applied to the chip's address pins, which specifies which word in the chip is to be accessed. If the memory address consists of M bits, the number of addresses on the chip is 2M, each containing an N bit word. Consequently, the amount of data stored in each chip is N2M bits.The memory storage capacity for M number of address lines is given by 2M, which is usually in power of two: 2, 4, 8, 16, 32, 64, 128, 256 and 512 and measured in kibibits, mebibits, gibibits or tebibits, etc. Currently (2014) the largest semiconductor memory chips hold a few gibibits of data, but higher capacity memory is constantly being developed. By combining several integrated circuits, memory can be arranged into a larger word length and/or address space than what is offered by each chip, often but not necessarily a power of two.

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