Assume that a MIPS CPU has 64-bit instructions instead of 32-bit instructions. F
ID: 3685051 • Letter: A
Question
Assume that a MIPS CPU has 64-bit instructions instead of 32-bit instructions. Further assume that the CPU hardware is able to process these instructions with no other changes necessary (for example, a LW works the same way as its 32-bit counterpart). What change to the MIPS microcode is necessary to handle 64-bit instructions? Which steps of the fetch, decode, execute, memory access, and write back are affected?
Hints:
1. MIPS instructions are assumed to be 64 bits.
2. Nothing else changes. Just assume that everything works as it does before the change in the size of a MIPS instruction.
Explanation / Answer
It separates the machine instructions from the underlying electronics so that instructions can be designed and altered more freely. Each step needed to fetch, decode, and execute the machine instructions (including any operand address calculations, reads, and writes) was controlled directly by combinational logic and rather minimal sequential state machine circuitry. While very efficient, the need for powerful instruction sets with multi-step addressing and complex operations made such hard-wired processors difficult to design and debug; highly encoded and varied-length instructions can contribute to this as well, especially when very irregular encodings are used.
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