Before starting the processor design - we need to be clear about the behavior of

Question

Before starting the processor design - we need to be clear about the behavior of the different MIPS instructions we'll be focusing on in our designs. This includes R-type (add,sub), lw, sw, beq, j, and a few others. Which of the following descriptions matches the behavior of a MIPS lw instruction?

A. The ALU performs an add, the data memory is read, and the register file writes the value read from memory to register rt. The program counter is incremented by 4.

B. The ALU performs an add and the register file writes the value computed to register rd. The program counter is incremented by 4.

C. The ALU performs a sub. If the result of the sub is zero, this impacts the value written to the program counter.

D. The ALU performs an add, the value in register rt is written to memory at the address computed by the ALU. The program counter is incremented by 4.

Explanation / Answer

b. The ALU performs an add and the register file writes the value computed to register rd. The program counter is incremented by 4.

Explanation:

Given MIPS instructions are R-type (add,sub), lw, sw, beq, j

Initially the ALU performs add operation and then the register file writes the value computed and then the program counter is incremented by 4.

Using this statement a word is loaded into a register from the specified address.

Example Operation:
$t = MEM[$s + offset]; advance_pc (4);
Syntax:
lw $t, offset($s)

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