1.Given that the stack is initially empty. What will it contain after these inst
ID: 3691271 • Letter: 1
Question
1.Given that the stack is initially empty.
What will it contain after these instructions? (starting with the top)
BiPush 1
BiPush 2
DUP
BiPush 4
BiPush 2
BiPush 3
IADD
IF _ICMPEQ L1
ISTORE x
L1 SWAP
2.Given that the stack initially contains [0, 300] (starting with the top)
What will it contain after these instructions? (starting with the top)
L1 SWAP
DUP
IFEQ L2
BiPush -1
IADD
SWAP
BiPush 2
IADD
GOTO L1
L2 POP
3.Write the Java code for this IJVM code:
2 points for the least number of correct statements, 1 point for all other correct answers.
ILOAD x
ILOAD y
ISUB
IFLT L1
BiPUSH 2
GOTO L2
L1 ILOAD z
BiPush 1
IADD
L2 ISTORE z
Given a Direct-Mapped cache with 64 byte data entries, that is accessed with a 12 bit line field, and assuming that address 64 is currently in the cache, which address could not also be present in the cache? (Select all correct answers)
131,027
131,028
262,208
262,271
262,272
Given a Direct-Mapped cache with 32 byte data entries, that can hold 64k total bytes of data, and assuming that address 127 is currently in the cache, which address could not also be present in the cache? (Select all correct answers)
65,662
65,663
65,664
131,200
131,201
Given a 4-way set associative cache that can hold 1MB of data, with 64 byte cache line entries and 64-bit virtual addresses. Calculate the LINE # in hex
for memory address A457 F1BC C329 0F91.
Give your answer in hex digits.
(Choose two) Which of the following is true of cache levels?
If a miss occurs at cache level 2 then cache level 3 is searched
If a miss occurs at cache level 3 then cache level 2 is searched
Cache level 2 contains data, cache level 3 contains instructions
Cache level 3 contains data, cache level 2 contains instructions
CPU cache is generally split
CPU cache is generally unified
(Select all correct answers) Which of the following is true of temporal locality?
It is based on the assumption that addresses nearer to recently accessed addresses will be accessed in the near future.
It based on the assumption that a memory address that was recently used will be required in the near future
It results in more addresses being brought in than was orginally requested
It discards those addresses that have been least recently used.
It is used to determine which addresses should the cache should hold.
(Select all correct answers) Which of the following is true of write through?
It implies that the cache is updated on a write
It implies that memory is updated on a write
It may use the Least Recently Used algorithm
It aids in the case of system recovery
t is used during a write miss
Which of the following are true of the Instruction Fetch Unit? (choose two)
It avoids the need for the ALU to increment the PC
It eliminates excess hardware
It insures that the value in the PC is always on a word boundary
It eliminates the need for the main execution unit to write to the PC
It monitors a bus, to check when the PC is loaded
11. Which of the following are possible ways of dealing with conditional branches in pipelined computers?
Add a delay slot
Perform a write though
Perform a deferred write
Perform a write allocation
Perform a write back
Explanation / Answer
ANS;
this question has multiple subparts. I am answering the first 2.
1)
bipush 1 will push 1 in the stack. bipush 2 will push 2 in the stack.
stack will have 1 2
Dup will increase the size of the stack
and with three new bipush we will have 3 2 4 1 2 in stack
there will be add operation on the stack and a store to follow
2)
value in stack will be -1,0,300
after iadd it will add it and 2 will be pushed to stack
so stack will have 2,-1,0,300
with pop instruction 2 will be popped out of the stack. So finally stack will contain -1,0,300
2)
The code is to multiply x and y and storing the result in z
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