Suppose that the processor has access to two levels of memory. Level 1 contains

Question

Suppose that the processor has access to two levels of memory. Level 1 contains 1000 data words and has an access time between the CPU and L1 of 2.5 nanoseconds (2.5E-9 sec); level 2 contains data 100,000 words and has an access time between L1 and L2 transfers of 5.0 nanoseconds (5.0E-9 sec)

Assume that data requests by the CPU have a hit ratio, H in the L1 cascade of 0.7, and any requests missed in L! Are guaranteed to be found in L2. What is the average memory assess time in nanoseconds for data requests by the CPU?

Explanation / Answer

tavg =hC1+(1h)C2

h is the hit rate in the L1 caches.
1-h is the hit rate in the L2 cache.
C1 is the time to access information in the L1 caches.
C2 is the miss penalty to transfer information from the L2 cache to an L1 cache

tavg = 0.7 * 2.5ns + 0.3 * 5.0ns

tavg = 3.25ns

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