x3100: 0101 0000 1111 0000 x3101: 0000 0000 1111 1111 And that the following dat
ID: 3753472 • Letter: X
Question
x3100: 0101 0000 1111 0000 x3101: 0000 0000 1111 1111 And that the following data is in the specified registers: PC: 0011 0000 0000 0000 What are the contents of the registers below after each phase of the Instruction Cycle (Fetch- Execute Cycle)? Show all values in hex. If you don't know the value of something, mark it with a 7 Fetch Instruction Decode Evaluate Fetch Execute Store Result Address Operands PC IR MAR MDR R3 For the instructions ADD, LDR, and STI, list which phases of the Instruction Cycle are used when performing each instruction. 6. 7. Book problem 4.16 0 7866668 5 0Explanation / Answer
Instruction cycle:
An instruction cycle is a process of executing a single instruction in a program . Whenever each instruction gets executed by the CPU, it goes through various stages of the instuction cycle.At each stage , a micro operation is carried out,
The following are the stages present in an instruction cycle:
Fetch - Gets the address of the next instruction into the program counter
Decode - The CPU identifies what type of instruction it is .and also identifies the operands provided in the instruction
Execute - performs the operation present in the instruction
In some processor architectures ,the first two stages i.e, the fetch and decode ar ecosidered together as a single cycle as "Fetch cycle" and the execution in performed in the execution cycle.
Based on the type of instruction and the mode of accessing the memory addresses the number of micro operations performed may change from instruction to instruction
The following are the phases of the instruction - ADD
ADD instruction sums up the values of operands present in the given registers(or memory locations) and stores the result into the first operand's address location.This is an arithmetic instruction
Eg: ADD A,B adds the values of operands present in locations of A and B and stores the result in location A
Consider an example of ADD instruction
ADD A,B
1. Fetch the instruction from the address present in the program counter PC
(Program Counter is a register that holds the address of the next instruction to be executed)
2.Increment the program counter PC to next instruction address
3.Decode the instruction from the instruction register(IR) and the operands
4.Load the operand values from their respecticve addresses in the memory
5.Execute the instruction ADD on the operands A and B
6.Store the sum (result ) in the memory location A
The following are the phases of the instruction - LDR
LDR - Loads the data into the processor register from a specified memory location.It requires two operands(arguments) one to specify the register into which the data needs to be loaded and other to specify the address location from which the data needs to be brought .This is a data transfer instruction
Consider the example:
LDR R2 , [R0]
this instruction loads the data present in the location specified in R0 into the register R2
the following are the phases in the instruction sysle involved:
1. Fetch the instruction from the address present in the program counter PC
2.Increment the program counter PC to next instruction address
3.Decode the instruction from the instruction register(IR)
4.Evaluate the origin address of the data to be loaded into the register R2 by reading the memory address represented by the value present in register R0
5.This operation doesnot require execute phase as theres no arithmetic or logical operation involved
6.Store the (result ) into the register R2
The following are the phases of the instruction - STI
STI - set interrupt flag (IF) which allows the processor(CPU) to enter an interrupt service routine (ISR) to respond external intrerrupts .This is a processor control instruction.
the following are the phases in the instruction sysle involved:
1. Fetch the instruction from the address present in the program counter PC
2.Increment the program counter PC to next instruction address
3.Decode the instruction from the instruction register(IR)
4. Load the effective address of the interrupt service routine to PC
5.execute phase involves setting Interrupt flag IF to 1.
6.This instruction doesnot carryout any store operation
Related Questions
Navigate
Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.