An arbiter controls access to a common resource. It uses a rotating-priority sch

Question

An arbiter controls access to a common resource. It uses a rotating-priority scheme in responding to requests on lines R1 through R4. Initially, R1 has the highest priority and R4 the lowest priority. After a request on one of the lines receives service, that line drops to the lowest priority, and the next line in sequence becomes the highest-priority line. For example, after R2 has been serviced, the priority order, starting with the highest, becomes R3, R4, R1, R2. What will be the sequence of grants for the following sequence of requests: R3, R1, R4, R2? Assume that the last three requests arrive while the first one is being serviced.

Explanation / Answer

An arbiter controls access to a common resource. It uses a rotating-priority scheme in responding to requests on lines R1 through R4

R1,R2,R3,R4 (Descending order)

A large set of control lines carries the signals used for timing and the instruction Add R4, R2, R3 adds the contents of registers R2 and memory Processor-memory interface R1,R2,R3,R4 Control Processor IR R n –1 n ..... Initially, all instructions are stored in the main memory, and the cache is empty.

To perform a given task, an appropriate program consisting of a list of instructions is stored in the memory. Individual instructions are brought from the memory into the processor,
which executes the specified operations. Data to be used as instruction operands are also stored in the memory.

Load     R1, LOC

This instruction reads the contents of a memory location whose address is represented symbolically by the label LOC and loads them into processor register R1. The original
contents of location LOC are preserved, whereas those of register R2 are overwritten.Execution of this instruction requires several steps. First, the instruction is fetched from
the memory into the processor. Next, the operation to be performed is determined by the control unit.   The operand at LOC is then fetched from the memory into the processor.
Finally, the operand is stored in register R1.

After operands have been loaded from memory into processor registers, arithmetic or logic operations can be performed on them. For example, the instruction

Add     R3, R4, R1, R2

After completing the desired operations, the results are in processor registers. They can be transferred to the memory using instructions such as
Store     R4, LOC
This instruction copies the operand in register R4 to memory location LOC. The original contents of location LOC are overwritten, but those of R4 are preserved.
For Load and Store instructions, transfers between the memory and the processor are initiated by sending the address of the desired memory location to the memory unit and
asserting the appropriate control signals.   The data are then transferred to or from the memory

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