E] In code shown below, the interrupt-enable bit in the PS is set last in the ST

Question

E] In code shown below, the interrupt-enable bit in the PS is set last in the START section of the
Main program. Why? Does the order matter for earlier operations in START? Why or why
not?

Interrupt handler
ILOC: Subtract SP, SP, #12 Save registers.
Store LINK_reg, 8(SP)
Store R2, 4(SP)
Store R3, (SP)
MoveControl R2, IPENDING Check contents of IPENDING.
And R3, R2, #4 Check if display raised the request.
Branch_if_[R3]0 TESTKBD If not, check if keyboard.
Call DISR Call the display ISR.
TESTKBD: And R3, R2, #2 Check if keyboard raised the request.
Branch_if_[R3]0 NEXT If not, then check next device.
Call KISR Call the keyboard ISR.
NEXT: Check for other interrupts.
Load R3, (SP) Restore registers.
Load R2, 4(SP)
Load LINK_reg, 8(SP)
Add SP, SP, #12
Return-from-interrupt
Main program
START: Set up parameters for ISRs.
Move R2, #2 Enable interrupts in
StoreByte R2, KBD_CONT the keyboard interface.
Move R2, #4 Enable interrupts in
StoreByte R2, DISP_CONT the display interface.
MoveControl R2, IENABLE
Or R2, R2, #6 Enable interrupts in
MoveControl IENABLE, R2 the processor control register.
MoveControl R2, PS
Or R2, R2, #1
MoveControl PS, R2 Set interrupt-enable bit in PS.
next instruction
Keyboard interrupt-service routine
KISR:
...
Return
Display interrupt-service routine
DISR:
...
Return

Explanation / Answer

Setting Interrupt Enable Bit:

Interrupt Enable Bit is typically set after all individual interrupt sources have been configured.

Order of earlier operations:

Order does not matter of earlier operations. Important thing is that all applicable interrupt sources should be set/enabled.

Related Questions

Navigate

• Browse (All)
• Browse E
• Subjects

Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.