The table below lists parameters for different direct-mapped cache designs. Cach
ID: 3765298 • Letter: T
Question
The table below lists parameters for different direct-mapped cache designs.
Cache data size
Cache block size
a.
64 KB
1 word
b.
64 KB
2 words
Calculate the total number of bits required for the cache designs listed in the table, assuming a 32-bit address (total means bits required for both tag array and data array).
For the same cache design parameters, the cache topology becomes 4-way set-associative. Calculate the total number of bits as asked in (a).
Cache data size
Cache block size
a.
64 KB
1 word
b.
64 KB
2 words
Explanation / Answer
The table below lists parameters for different direct-mapped cache designs. Cach
Related Questions
drjack9650@gmail.com
Navigate
Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.