In this question, we will examine space/time optimizations for page tables. The
ID: 3775631 • Letter: I
Question
In this question, we will examine space/time optimizations for page tables. The following list provides parameters of a virtual memory system. Virtual address (bits) Physical memory instated Page si/e PTE size (byte) 4316GiB 4KiB 4 For a single level page table, how many page table entries (PTEs) are needed? Mow much physical memory is needed for storing the page table? Using a multilevel page table can reduce the physical memory consumption of page tables, by only keeping active PTEs in physical memory. How marry levels of page tables will be needed this case? And how many memory references are needed for address translation if missing in TLB?Explanation / Answer
// Answer for Part A :
For a Single level Page Table :
1 KB = 1024 Bytes 4KB = 2^12 Bytes.
Page Table Entries are : 2 Power 43 (2^43) / 2 Power 12 (2^12 bytes) per page(4 KiBytes per page)
2^43 / 2^12 = 2^31 Page Table Entries(PTEs)
16 GiB Of Physical Memory(2 Power 120 i.e 2^120 )/ 2 Power 12 (2^12 bytes) per page
2^120 / 2^12 = 2^108 Physical Pages
Page Table Size :
(2^31)*(2^2) = 2^33 bytes .
// Answer for Part B:
Levels of Page Tables Needed:
4KB per page / 4 Bytes for each PTE = 1024 Entries
10 bits of address space needed for each page
Ceil(31(PTEs) /10 ) = 4
4 Levels of Page tables are needed.
Memory references:
Multi level paging address translation allocates memory as many page tables as used.
Memory references can be calculated by using the following formula :
Cost of address translation = Cost of PageTable LookUp + Prob(TLB Miss) * Cost of page table lookup.
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