eee230 Instruction details Answer the following questions in a typed paper (sing

Question

eee230 Instruction details

Answer the following questions in a typed paper (single spaced, 12 font) for each instruction: How many bits are used? Is the loading utilization n the upper, lower or all? Is the use of this instruction loading a constant or variable? What is the format of this instruction? Is the transfer: Register to Register, Register to Memory, or Memory to Register? Is the math signed, unsigned, or neither? Is this a pseudo instruction or not? Instructions lui Iw sw andi ori la srl sll add addi addiu

Explanation / Answer

a

b

c

d

e

f

g

1

32 bits

all

constant

R-type

Register to Register

   either

yes

2

16,32 bits

all

variable

I-type

Memory to register

Unsigned

yes

3

16,32 bits

all

variable

I-type

Register into RAM

Unsigned

yes

4

32 bits

all

variable

I-type

Register to Register

Unsigned

yes

5

16 bits

all

constant

I-type

Register to Register

Unsigned

yes

6

32 bits

all

constant

R1,D2(X2,B2)

Register to RAM

Signed

yes

7

32 bits

lower

variable

R1,D2(B2)

Register to Register

either

yes

8

32 bits

upper

variable

R1,D2(B2)

Register to Register

either

yes

9

32 bits

all

variable

R-type

Register to Register

either

yes

10

16 – 32 bits

all

variable

     I-type

Register to Register

Signed

yes

11

32 bits

all

variable

I-type

Register to Register

Unsigned

yes

a

b

c

d

e

f

g

1

32 bits

all

constant

R-type

Register to Register

   either

yes

2

16,32 bits

all

variable

I-type

Memory to register

Unsigned

yes

3

16,32 bits

all

variable

I-type

Register into RAM

Unsigned

yes

4

32 bits

all

variable

I-type

Register to Register

Unsigned

yes

5

16 bits

all

constant

I-type

Register to Register

Unsigned

yes

6

32 bits

all

constant

R1,D2(X2,B2)

Register to RAM

Signed

yes

7

32 bits

lower

variable

R1,D2(B2)

Register to Register

either

yes

8

32 bits

upper

variable

R1,D2(B2)

Register to Register

either

yes

9

32 bits

all

variable

R-type

Register to Register

either

yes

10

16 – 32 bits

all

variable

     I-type

Register to Register

Signed

yes

11

32 bits

all

variable

I-type

Register to Register

Unsigned

yes

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