Here is a series of addresses in hexadecimal: 20(w), 3C(r), 10(r), 16(w), 20(r),

ID: 3795109 • Letter: H

Question

Here is a series of addresses in hexadecimal:

20(w), 3C(r), 10(r), 16(w), 20(r), 04(w), 28(r), 6(r), 10(w), 17(w)

Assume a LRU replacement algorithm. Draw each of the following caches as it would appear at the end of the series of references, including valid bit, dirty bit and tag:

a. A direct-mapped cache with block size of 16 words

b. 2-way set-associative cache with block size of 8 words

c. 4-way set-associative cache with block size of 4 words

d. A fully associative cache with block size of 32 words

Show the contents of the memory block using the byte address range such as M[20-23] for the word with address 22.

Explanation / Answer

Cache a

Cache b

Cache c

Cache d

total # bits need for word + byte

displacement

# bits needed for index

# bits needed for tag

# bits (total) per set (including valid

and dirty bits)