Suppose that a new instruction resides at memory address 0x08000000 and that the
ID: 3796448 • Letter: S
Question
Suppose that a new instruction resides at memory address 0x08000000 and that the rightmost 16 bits within the machine code for the new contains the value 0x00AA. To what value (expressed in hex) would the PC be set if the zero flag=1 when the beq instruction is executed? Suppose that a new instruction resides at memory address 0x08000000 and that the rightmost 16 bits within the machine code for the new contains the value 0x00AA. To what value (expressed in hex) would the PC be set if the zero flag=1 when the beq instruction is executed? Suppose that a new instruction resides at memory address 0x08000000 and that the rightmost 16 bits within the machine code for the new contains the value 0x00AA. To what value (expressed in hex) would the PC be set if the zero flag=1 when the beq instruction is executed?Explanation / Answer
Branch Instructions:Branch instructions perform a test by evaluating a logical condition and depending on the outcome of the condition modify the program counter to take the branch or continue to the next instruction.Branch instructions are always relative to the current program counter. That is, the next instruction is obtained by adding a signed offset to current program counter:
PC += (int)offset
Branches are inherently relocatable. That is, the program can be moved to any other block of memory and still execute correctly.
Jump Instructions:Jump instructions modify the program counter so that executation continues at a specified memory address, no matter (almost) the value of the current program counter. Branch instructions, by contrast, are always relative to the current program counter.
There are four different basic jump instructions. You can specify a register that contains the jump target address or you can specify the jump target address as an immediate operand. For each choice, you can place a return address (PC+8) in a register for later use.
BEQ->Branc on Equal->if Rs==Rt PC+=(int)offset
Branch Address calculation:
In MIPS branch instruction has only 16 bits offset to determine next instruction. We need a register added to this 16 bit value to determine next instruction and this register is actually implied by architecture. It is PC register since PC gets updated (PC+4) during the fetch cycle so that it holds the address of the next instruction. Also limit the branch distance to -2^15 to +2^15-1 instruction from the branch instruction.
Steps:
From the above solution is
current address of instruction+4=0x0800000+4=0x08000004
new branch =0x00AA
to encode=differenc/4=0x08000004-0b10101010/4=0x7FFFF5A/4=1FFFFD6
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