Section 2. Multiple Choice: Select and clearly mark the options that are correct

Question

Section 2. Multiple Choice: Select and clearly mark the options that are correct for each problem.   There can be more than one option selected for each problem. (24 POINTS)

1. Which of the following statements is correct for the RTI instruction?

a. disables global maskable interrupts

b. restores address of the interrupted program to the program counter

c. restores device control registers to original values

d. implicitly restores global interrupts

2. Which statement(s) is true for Maskable Interrupts

a. Maskable Interrupts are enabled using the X bit of the CCR

b. Maskable Interrupts cannot be disabled once they are enabled

c. Maskable Interrupts should not be enabled in an interrupt subroutine

d. Maskable Interrupts are used to handle routine system events

3. Which registers are used to enable interrupts on the timer channels?

a. CCR register

b. TSCR1 registers

c. TSCR2 register

d. TIE register

4. Which registers are used to set up inputs on Port J?

a PERJ

b. RDRJ

c. PPSJ

d. DDRJ

5. Which bit(s) must be set to trigger an IRQ on TCNT rollover

a. TOF bit of TFLG2 register

b. TOI bit of TSCR2 register

c. C0F bit in TFLG1 register

d. C7I bit of TIE register

6. Which registers are used to set up outputs on Port P?

a PERP

b. RDRP

c. PPSP

d. DDRP

Explanation / Answer

1. Which of the following statements is correct for the RTI instruction?

             b. restores address of the interrupted program to the program counter

             c. restores device control registers to original values

Hint : The RTI instruction restores from the stack all the information that was previously saved when the interrupt occurred. This restores the original value back into the PC.

2. Which statement(s) is true for Maskable Interrupts

a. Maskable Interrupts are enabled using the X bit of the CCR

Hint:

Interrupts can be enabled and disabled using mask bits (x and i) in the CCR.

3.Which registers are used to enable interrupts on the timer channels?

b. TIE register

Hint : TICIE1: Timer/Counter1 Input Capture Interrupt Enable

When the TICIE1 bit is set (one) and the I-bit in the Status Register is set (one), the Timer/Counter1 Input Capture Event Interrupt is enabled.

4.) Which registers are used to set up inputs on Port J?
                                      Port J Data Direction Register (DDRJ)

Hint : Port J data directio

This bit determines whether the associated pin is an input or output.

0 Associated pin configured as input

5. Which bit(s) must be set to trigger an IRQ on TCNT rollover

                      TOF bit of TFLG2 register

Hint : whenever a roll over occurs with TCNT the Timer Over Flow flag (TOF) is set in timer interrup flag register 2 (TFLG2) indicating that the TCNT has rolled over(timer over flow).

6. Which registers are used to set up outputs on Port P?

Port J Data Direction Register (DDRJ)

Hint : Port J

This bit determines whether the associated pin is an input or output.

1 Associated pin configured as output

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