Consider a demand paging virtual memory system with 24 bit virtual address space

Question

Consider a demand paging virtual memory system with 24 bit virtual address space, page size is (8KB or 2^13) and the system has 8 MB of main memory. Assume the page table is single level and stored in memory. a. When we split a logical address into page number and offset within the page, how many bits are used for the page number, and how many bits are used for the offset? b. Assuming page table entries are 4 bytes each and a single level page table is used, how many bytes are required to store a page table? c. If the OS reserves 1 MB (128 frames) of physical memory for kernel code, buffers, etc., how many physical frames are left for demand paging? d. Suppose at some point in time our TLB contains the entries: The user attempts to access the logical address 0000 0000 1000 1011 0011 0100. Is this a TLB miss? Briefly explain. e. What is the physical address?

Explanation / Answer

Solution:

Total number of bits are 24

b)

No of bytes required to store a page table is= number of pages* page entry size= (2^11)* 4 Byte= 8 KB

c)

So the main memory size is 8 MB which means physical address will take 26 bits, If 1 MB is reserved by the kernel then 8 frames are remaining for demand paging.

d)

No, this is a TLB hit, if you devide the given bits in two halves of page# and offset then it will be 00000000100 0101100110100.

which means that currently page# 4 is there in the memory.

e)

A Physical address is a binary address or real address of the memory which represents where it is pointing to in the main memory to a particular cell of primary storage or to a particular register in a memory-mapped I/O device.

Page# Offset 11 13

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