A 1-bit ALU selects and performs 4 operations based on the 2 select bits(S1,S0).

Question

A 1-bit ALU selects and performs 4 operations based on the 2 select bits(S1,S0). The whole ALU consists of the 2 select bits, 2 input bits(A,B), and 1 output(F). A special input(CarryIn) and output(CarryOut) is also integrated into the ALU for specifically the addition function. The output F is dependent on the select bit because the select bit choose which operation it will perform.

URGENT make a Verilog program that satisfies this test bench for a 8-Bit ALU!!! Pictures swapped in order, The specific requirements for this includes designing and exhaustively testing a 1-bit ALU using dataflow. This is done in order to insure that the 8-bit ALU will work. Once the 1-bit ALU works, an 8-bit ALU needs to be designed using multiple instances of the 1-bit ALU. This 8-bit ALU is required to have 2 1-bit select bits(S1,S0) but with inputs(A,B) and output(F) being 8 bits wide. A 1-bit wide CarryIn and CarryOut bit will also be integrated into the 8-bit ALU. All this needs to be tested using the test bench provided to us on the class website.

Explanation / Answer

Controlled by the four function select inputs (S0 to S3) and the mode control input (M), ALU can perform all the 16 possible logic operations or 16 different arithmetic operations on active HIGH or active LOW operands.

When the mode control input (M) is HIGH, all internal carries are inhibited and the device performs logic operations on the individual bits. When M is LOW, the carries are enabled and the ALU performs arithmetic operations on the two 4-bit words. The ALU incorporates full internal carry look-ahead and provides for either ripple carry between devices using the Cn+4 output, or for carry look-ahead between packages using the carry propagation (P) and carry generate (G) signals. P and G are not affected by carry in.

For high-speed operation the device is used in conjunction with the ALU carry look-ahead circuit. One carry look-ahead package is required for each group of four ALU devices. Carry look-ahead can be provided at various levels and offers high-speed capability over extremely long word lengths. The comparator output (A=B) of the device goes HIGH when all four function outputs (F0 to F3) are HIGH and can be used to indicate logic equivalence over 4 bits when the unit is in the subtract mode. A=B is an open collector output and can be wired-AND with other A=B outputs to give a comparison for more than 4 bits. The open drain output A=B should be used with an external pull-up resistor in order to establish a logic HIGH level. The A=B signal can also be used with the Cn+4 signal to indicate A > B and A < B.

The function table lists the arithmetic operations that are performed without a carry in. An incoming carry adds a one to each operation. Thus, select code LHHL generates A minus B minus 1 (2s complement notation) without a carry in and generates A minus B when a carry is applied.

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