Consider a RISC microprocessor, like the MIPS presented in the textbook, for whi

Question

Consider a RISC microprocessor, like the MIPS presented in the textbook, for which we want to implement the full addressable space using byte addressability and 32-bit addresses. Assume we have a 320GB hard disk, a 1GB main memory, a 2MB L2 Cache and a 512KB internal Cache.

Assume that we define a memory hierarchy based on a block size of 32KB (block = page).

(a) How many blocks can be stored in each level of the memory hierarchy?

(b) Consider the three cache organizations (Direct, Fully Associative, and Set Associative Mapping). Explain how each of them works as well as the advantages and disadvantages for each organization.

Explanation / Answer

a)

Number of blocks in Hard disk = 320GB / 32KB = 10*2^20 blocks
Number of blocks in main memory = 1 GB / 32 KB = 2^30 B/ 2^15 B = 2^15 blocks
Number of blocks in L2 cache = 2MB/32KB = 2^21 / 2^15 = 2^6 blocks
Number of blocks in internal cache = 512KB/32KB = 2^19/ 2^15 = 2^4 blocks

here block size is 32KB . So 15 bits are used for offset in given implementation.

b)
-- > Direct cache :
In direct cache, all blockes of memory has specific cache line in cache.
From main memory more than one block can be assigned to the cache line.
when a new block has to be loaded in cache, and the line correspond to that block is already occupied then previous block is removed from cache and new block is loaded.
Which increases the number of main memory to cache and cache to main memory transfers.
If m bits are used for cache line and x bits are used to store offset,
then for each cache line there are n-m-x tag bits that has to be stored along with cache line.
where n is total number of bits used for addressing.

-- > Full associative :
In this, any block from main memory can be stored at any place in cache.
If n bits are used for addressing and x bits are used to store offset then,
total n-x bits has to be stored as tab bit with each cache line.

-- > Set associative :
Cache is divided in to sets. Each set can have one or more than one block.
Each memory block has fix corresponding set and block can be stored anywhere in that set.
When a new block has to be loaded in to cache, then previous block doesn't have to be removed from cache if there is empty space in that set.
Direct map is a set associative memory with set size 1 i.e each set has one block.
If n is addressing bits, x bits are used for offset and s bits are used for set number
then , n-x-s bits has to be stored with each cache line as tag bits.

If you have any doubts then you can ask in comment section.

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