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Change 1.6.5 to read: If the number of instructions executed in a certain progra

ID: 3877533 • Letter: C

Question

Change 1.6.5 to read:

If the number of instructions executed in a certain program is divided equally among the classes of instructions found in Table 1.6.3a except for class A, which occurs twice as often as each of the others, how much faster is one processor to the other. Specifiy which processor is faster.

please read the last information

Compiler A Compiler B # Instructions 1.00E+09 1.DOE +09 Execution time L S 0.8 s # Instructions 1.20E+09 1.20E+0S Execution time 1.4 s 0.7 s a. 16.1 15) For the same program, two different compilers are used. The table above shows the exection time o the two different compiled programs. Find the average CPI for each program given that the processor has a clock cycle time of 1 nS. 1.6.2 15 Assume the average CPIs found in 16., bu t the compiled programs run on two difference processors. If the execution times on the two processors are the same, how much faster is the dlock f e pucessor running compiler A's coce versus the clock of the processor running compiler B's code? 6.3 15| A new compiler is developed that uses only 600 million instruc- tions and has an average CPI of 1What is the speed-up ofusing this new mm piler versus using Compiler A or B on the original processor uf 1.6.1 Consider twvo different implementations, Pl and P2, of the same instruction set There are five classes of instructions (A, B, C, D, and E) in the instructionset. P1 has a clock rate of4 GHz, and P2 has a clock rate of 6 GHz. The average number of cycles for each instruction class for Pl and P2 ae listed i the following tabl. Class CPI on P CPI on P2 3 2 4 Class CPI on P1 CPI on P2 1

Explanation / Answer

For both P1 and P2, the maximum IPC are 1 and 0.5, respectively.
IPS = IPC * # of cycles in 1s

Therefore IPS for P1 = 1 * 4G = 4e9;

                        IPS for P2 = 0.5 * 6G = 3e9;

Average CPI = (2A+B+C+D+E) / (2+1+1+1+1). Here A, B, C, D, E refers to the CPI of each instruction on one of the implementation.

On P1, CPI = (2+2+3+4+3)/6 = 14/6;

Avg. time to execute 1 instruction: (14/6)/4GHz

On P2, CPI = (4+2+2+4+4)/6 = 16/6;

Avg. time to execute 1 instruction: (16/6)/6GHz


(Speed of P2) / (Speed of P1)
= (Avg. time per instruction on P1) / (Avg. time per instruction on P2)

= 21/16 or 1.31

Therefore P2 is 1.31 times faster than P1.

It can further be explained in other way as follows:-

The ideal instruction sequence for P1 is one composed entirely of instructions

3/2 from class A (which have CPI of 1).

So M1's peak performance is

(4x109 cycles/ second)/(1 cycle/instruction) = 4000 MIPS.

Similarly, the ideal sequence for M2 contains only instructions from A, B, and C (which all have a CPI of 2).

So M2's peak performance is (6×109 cycles/second)/ (2 cycles/instruction) = 3000 MIPS.

The average CPI of P1 is (1x2 + 2 + 3 + 4 + 3)/6 = 7/3.

The average CPI of P2 is (2x2 + 2 + 2 + 4 + 4)/6 = 8/3.

P2 then is ((6x109 cycles/second)/(8/3cycles/instruction))/((4x109 cycles/second)/(7/3 cycles/instruction)) = 21/16 times faster than P1.

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