The MIPS architecture supports byte and halfword (16-bit) memory transfer operat

Question

The MIPS architecture supports byte and halfword (16-bit) memory transfer operations. The instructions are load byte (lb), load byte unsigned (lbu), store byte (sb), load halfword (lh). load halfword unsigned (lhu) and store halfword (sh). Code: char a, b: //8-bit variables (a address 100) (b address 200) Part a) Assuming 8-bit operations are supported (lb, lbu, sb), write a MIPS code that swaps the variables a and b. Part b) If MIPS doesn't support byte and halfword operations, then we can access the memory using the 'load word' (lw) and store word' (sw) only, which are 32-bit operations. Accordingly, rewrite the code above using only (lw, sw) to access the memory. You can use other logic/arithmetic/branch instructions.

Explanation / Answer

NOTE:- we are taking the address of 2 variables into $t0,$t2 and then loading the values of the variables into $t1,$T3 and then storing them in alternate address back resulted in swapping

a)
swap:
li $t0,100
lb $t1,$t0
li $t2,200
lb $t3,$t2
sb $t3,$t0
sb $t1,$t2

b)
swap:
li $t0,100
lw $t1,$t0
li $t2,200
lw $t3,$t2
sw $t3,$t0
sw $t1,$t2

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