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help me to solve as soon as possible 2. The t bli belo repre ent ?ng 10 k dir el

ID: 3910545 • Letter: H

Question

help me to solve as soon as possible

2. The t bli belo repre ent ?ng 10 k dir el napped execution of s program. l cache with write-through at some point during the Data o1 Sdem(01000) 001 oi0 0I 100 101 10 Y 10Mem (10010) Mem(11110 Mem(00111 0o ) Show the modified table after the following sequence of cache acesses (listed by address): (Ox19 Ox0s. Qxor oxoo ox1Ll Assume that underlined accesses correspond to cache writes, while all others correspond to cache reads Remember that Ox means hexadecimal b) Which of the accesses from part 2a result in a cache read hit? 3. The table below represents the same scenario as part 2 using a write-back cache IndexV Tag Data Dirty YotMem(010001 001 010 ? ? Y | 10 Memf 100101 100 101 lt0 y u Mem 110 ) Show the modified table as er the following the following sequence of cache accesses (disted addres) 1OxIE OxID, Os08 0xI8 OxIE) Assume th while all others correspond to cache reads. at underlined accesses correspond to cache writes, b) Which of the acceses from part 3a result in a read hith ) Which of the accesses from part 3a will immediately change a value in memory?

Explanation / Answer

2a. Following is the modified table after the below sequence of cache accesses:

0x19(11001) address results in modification in 2nd row. This is because, last 3 bits in the address 0x19 is same as the index bits 001 in the 2nd row in the table. Therefore 0x19 is mapped to that cache block with index 001, with modifications in V column having value 'Y' as this block is valid now and the tag column is '11' which is the two MSB of 0x19.

0x05(00101) address results in modification in 6th row. This is because, last 3 bits in the address 0x05 is same as the index bits 101 in the 6th row in the table. Therefore 0x05 is mapped to that cache block with index 101, with modifications in V column having value 'Y' as this block is valid now and the tag column is '00' which is the two MSB of 0x05.

0x0F(01111) address results in modification in 8th row. This is because, last 3 bits in the address 0x0F is same as the index bits 111 in the 8th row in the table. Therefore 0x0F is mapped to that cache block with index 111, with modifications in V column having value 'Y' as this block is valid now and the tag column is '01' which is the two MSB of 0x0F.

0x11(10001) address results in modification in 2nd row. This is because, last 3 bits in the address 0x11 is same as the index bits 001 in the 2nd row in the table. Therefore 0x11 is mapped to that cache block with index 001, with modifications in V column having value 'Y' as this block is valid now and the tag column is '10' which is the two MSB of 0x11.

0x00(00000) address results in modification in 1st row. This is because, last 3 bits in the address 0x00 is same as the index bits 000 in the 1st row in the table. Therefore 0x00 is mapped to that cache block with index 000, with modifications in V column having value 'Y' as this block is valid now and the tag column is '00' which is the two MSB of 0x08.

2b. The addresses 0x05 and 0x00 where not present in the respective cache blocks in the row 6th(which is empty when address 0x05 is encountered) and in the row 1st(which had address 0x08 when address 0x00 is encountered). Therefore both the reads are not a hit.

3a. Following is the modified table after the below sequence of cache accesses:

0x1F(11111) address results in modification in 8th row. This is because, last 3 bits in the address 0x1F is same as the index bits 111 in the 8th row in the table. Therefore 0x1F is mapped to that cache block with index 111, with modifications in V column having value 'Y' as this block is valid now and the tag column is '11' which is the two MSB of 0x1F and Dirty column having value as 'Y' as it is a write access.

0x1D(11101) address results in modification in 6th row. This is because, last 3 bits in the address 0x1D is same as the index bits 101 in the 6th row in the table. Therefore 0x1D is mapped to that cache block with index 101, with modifications in V column having value 'Y' as this block is valid now and the tag column is '11' which is the two MSB of 0x1D. As it is read access there is no change in dirty bit.

0x08(01000) address results in modification in 1st row. This is because, last 3 bits in the address 0x08 is same as the index bits 000 in the 1st row in the table. Therefore 0x08 is mapped to that cache block with index 000, with modifications in V column having value 'Y' as this block is valid now and the tag column is '01' which is the two MSB of 0x08 and Dirty column having value as 'Y' as it is a write access.

0x18(11000) address results in modification in 1st row. This is because, last 3 bits in the address 0x18 is same as the index bits 000 in the 1st row in the table. Therefore 0x18 is mapped to that cache block with index 000, with modifications in V column having value 'Y' as this block is valid now and the tag column is '11' which is the two MSB of 0x18 and Dirty column is changed to 'N' as it is a read access.

0x1E(11110) address results in modification in 7th row. This is because, last 3 bits in the address 0x1E is same as the index bits 110 in the 7th row in the table. Therefore 0x1E is mapped to that cache block with index 110, with modifications in V column having value 'Y' as this block is valid now and the tag column is '11' which is the two MSB of 0x18 and Dirty column is changed to 'Y' as it is a write access.

3b. The addresses 0x1D and 0x18 where not present in the respective cache blocks in the row 6th(which is empty when address 0x1D is encountered) and in the row 1st(which had address 0x08 when address 0x18 is encountered) respectively. Therefore both the reads are not a hit.

3c. The address 0x18 when accessed, it is not present in cache block. The respective cache block has the content of memory address 0x08, which was accessed just before 0x18 is accessed. The access on 0x08 is a write access, so the dirty bit will be Y. Therefore when 0x18 memory has to be placed in cache, then the 1st row having 0x08 memory has to be replaced. Since the dirty bit is Y, it has to be written into memory. Hence 0x18 access results in immediate change in memory at address 0x08.

Index V Tag Data 000 Y 00 Mem[00000] 001 Y 10 Mem[10001] 010 Y 10 Mem[10010] 011 N 100 N 101 Y 00 Mem[00101] 110 Y 11 Mem[11110] 111 Y 10 Mem[10111]