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Implement a binary to BCD encoder using a state machine. Use the 16 switches as

ID: 3916172 • Letter: I

Question

Implement a binary to BCD encoder using a state machine.

Use the 16 switches as the binary input

Use the seven-segment display as the output

Use the 100 MHz clock to advance from state to state

If possible, do in Verilog code please

Binary to BCD converter with "Look Ahead" BCD Binary Hex Number Starting Binary Number Shift 1 Shift 2 Shift 3 Shift 4 Shift 5 Shift 6 Shift 7 Shift 8 Shift 9 Shift 10 Shift 11 Shift 12 Shift 13 Shift 14 Shift 15 (BCD Number) Decimal Number 0 0 100 11 0 1 1 1 1 o 011 0 1 1 0 0 01 0 1 0 011 1 1 001 0 0 00 1 001 0 1 0 0 This number exceeds 4, so add 3 before shifting left (1's column) This number exceeds 4, so add 3 before shifting left (10's column) This number exceeds 4, so add 3 before shifting left(100's column) Original LSB of each group of 4 (Hexadecimal grouping) Table 2 - Example of a Modified Binary to BCD Converter With "Look Ahead"

Explanation / Answer

timescale 1ns
module bcd(number, hundreds, tens, ones);
// input/output Signal Definitions
input [7:0] number;
output reg [3:0] hundreds;
output reg [3:0] tens;
output reg [3:0] ones;

// internal variable for storing bits
reg [19:0] shift;
integer i;

always @(number)
begin
// Clear initial value from shift register and store new number in shift register
shift[19:8] = 0;
shift[7:0] = number;
  
// Loop eight times
for (i=0; i<8; i=i+1) begin
if (shift[11:8] >= 5)
shift[11:8] = shift[11:8] + 3;
  
if (shift[15:12] >= 5)
shift[15:12] = shift[15:12] + 3;
  
if (shift[19:16] >= 5)
shift[19:16] = shift[19:16] + 3;

// Shift entire register left once
shift = shift << 1;
end
  
// Pushing decimal numbers to output
hundreds = shift[19:16];
tens = shift[15:12];
> end

endmodule

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