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Question 20 10 pts Suppose we have a cache / memory system with the following pa

ID: 3918406 • Letter: Q

Question

Question 20 10 pts Suppose we have a cache / memory system with the following parameters: . L1 cache with a 5% miss rate, cache hits require 1 clock cycle . Clock rate of 1 GHz (1 clock cycle 1 nanosecond) . Memory system accesses require 20 n nds 1. What is the average memory access time for a system with only a L1 cache? 2. We decide to add a second L2 cache that will be accessed only when accesses miss the L1 cache. If the L2 cache has a miss rate of 1%, what percentage of memory accesses will miss both caches and

Explanation / Answer

1. Cache miss rate (given) = 5%

Therefore, cache hit rate = (100 - 5) = 95%

Clock cycle time = 1/Clock rate = 1 ns

Cache hit time (given) = 1 clock cycle time = 1 ns

Miss penalty = Memory access time + Cache hit time = 20 +1 = 21 ns

Therefore,

Average memory access time = (Hit rate)*(Hit time) + (Miss rate)*(Miss penalty) = 0.95*1 + 0.05*21 = 2 ns

2. By introducing a L2 cache with a miss rate of 1% (meaning a L2 cache hit rate of (100-1)=99%)

Average Memory Access Time = (L1 Hit Rate)*(L1 Hit Time) + (L1 Miss Rate)*((L2 Hit Rate)*(L2 Hit time) + (L2 Miss rate)*(L2 Miss penalty)) = 0.95*1 + 0.05*(0.99*(1+1) + 0.01*(1+1+20)) = 0.95 + 0.05*(0.99*2 + 0.01*22) = 0.95 + 0.05*2.2 = 1.06 ns

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