Consider the following MIPS code: Loop: addi $t0, St0, 1 beq $t0, $s1, Exit add

Question

Consider the following MIPS code: Loop: addi $t0, St0, 1 beq $t0, $s1, Exit add $t0, $t0, $t0 add St0, $t0, $t0 add $t1, $a0, $t0 1w $t2, 0($t1) add $s0, $t2, $s0 j Loop Exit: Assume that the loop goes to label Exit in the 100th iteration after running completely for 99 times. The following delays are: Instructional and Data memories: 1.5 ns Register File: Ins All other components: 0.5ns Calculate the total time taken to execute the above program on both single cycle and multi-cycle implementations.

Explanation / Answer

line code 1 : 1 instrucational + 2 registers + procesing (0.5ns) ::= 4 ns LC2 :: 1 ISR + 2 registers + processing = 4ns LC3 :: 1 ISR + 3 registers + processing = 5ns LC4 :: 1 ISR + 3 registers + processing = 5ns LC5 :: 5ns LC6 :: 1 ISR + 2 registers + 1 data memory + processing = 5.5ns; LC7 :: 5 LC8 :: 2 ISR = 3 LC9 (exit) :: 1 IRS = 1.5ns; in single cycle implementation :: LC1 + LC2 + LC8 = 4 + 4 + 1.5 = 9.5ns in 100 cycle implementation :: 100(LC1 + LC2) + 99(LC3 + 4+ 5+ 6+7+8) + LC8 = 100*8 + 99*(28.5) + 1.5 = 3623 ns

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